Gadgetory

now as some of you may know Intel's p67 platform has only 16 PCI Express lanes available for graphics configurations well basically available for your main 2 PCIe slot to ensure you a board that doesn't have stuff installed on it so you've only got 16 PCI Express lanes for this one in this one which means you can either do 16 X and actually I think you can make it run at 1x so maybe 17 PCI Express lanes not the point okay so it's either 16 X or 8 X 8 X on these two now some Sandy Bridge boards p67 boards that is have a third PCI Express 16 X physical slot this isn't the only one but this is the asou Speidel X and this one does have a third slot so because there's only 16 lanes running off of the CPU itself for those graphics card slots where does this extra PCIe 16x slot run off of well the answer is that this is actually only a PCIe 4x slot and it actually runs off of the chipset so there is an inherent delay now the chipset does get a fair bit of bandwidth to the CPU itself but that PCIe slot is actually not tied directly to the CPU the way that the other ones are so I had someone ask me a question what if you're running something like this like an OCC Revo Drive X to 240 gig I happened to have one handy this is their performance difference between running it off of a PCIe slot that's running off the CPU versus running it off a PCIe slot that's running off what is essentially in archaic terms the Southbridge so this video is an attempt to answer that I'm just going to be using crystal disk mark to keep things simple and so I'm running five five times the entire test I'm running it over a four gig span of the drive and here are my results running it in the in theory faster PCIe slot and now I'm going to run it in the other PCIe slot and see what happens well it would appear that I have my answer the sequani chill numbers are oddly enough very very close for reads this is running off of the chipset PCIe slot and then the screen shot I have here on the left is running off of the CPU PCI Express slot so the sequential reads are pretty much within margin of error the sequential writes look to be a little bit higher on the on the chipset PCI Express slot for whatever reason and then moving down into the random reads and writes it looks like four reads we're pretty much within the margin of error but then for random writes for whatever reason actually well random reads here up you know what overall random performance seems to be higher on the CPU PCI Express versus on the chipset PCI Express and that does seem to be like a noticeable overall trend so yeah I'm not sure why that would be maybe it's to do with the latency is involved although storage latencies are usually what I should say is is is chipset latencies are usually nothing compared to storage Layton sees so I I wouldn't have thought that it would affect it that much but it looks like for whatever reason the the the lower latency between the CPU and this PCI Express slot versus the CPU to that chipset to that PCI Express slot seems to give us slightly better performance in random reads both in a light workload scenario as well as in a heavy workload scenario so thank you for checking out this little Linus tech tips video about the Revo drive x2 on the p67 chipset don't forget to subscribe for more bucks sings reviews and other computer videos